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Understanding 2's Complement

1. Why Not Just Use Sign-Magnitude?​

The most intuitive way to represent negative numbers would be to use one bit as a sign flag — e.g., 0 = positive, 1 = negative. This is called sign-magnitude. But it has two problems:

  • Two representations of zero: 0000 (+0) and 1000 (−0)
  • Addition hardware needs to check the sign bit and handle it specially

2's complement solves both problems. It is the universal standard in digital hardware — including this ADC.


2. The Core Idea​

In an N-bit 2's complement system, the most significant bit (MSB) has a negative weight.

For a 4-bit example (N = 4):

Bit position3210
Weight−8+4+2+1

The MSB contributes −8 instead of +8. Every other bit works normally.

So to decode any 4-bit 2's complement pattern:

Value = -b3 * 8 + b2 * 4 + b1 * 2 + b0 * 1

3. The Full 4-bit Table​

BinaryMSB weightCalculationDecimal value
011100+4+2+1+7
011000+4+2+0+6
010100+4+0+1+5
010000+4+0+0+4
001100+0+2+1+3
001000+0+2+0+2
000100+0+0+1+1
000000+0+0+00
1111−8−8+4+2+1−1
1110−8−8+4+2+0−2
1101−8−8+4+0+1−3
1100−8−8+4+0+0−4
1011−8−8+0+2+1−5
1010−8−8+0+2+0−6
1001−8−8+0+0+1−7
1000−8−8+0+0+0−8

Key observations:

  • MSB = 0 → always a positive number (or zero)
  • MSB = 1 → always a negative number
  • Range is asymmetric: −8 to +7. There is one more negative value than positive. This is why the ADC codes run −2048 to +2047, not −2047 to +2047.
  • Only one zero (0000) — a big advantage over sign-magnitude.

4. How to Negate a Number (The "2's Complement" Operation)​

To flip the sign of any number, you apply the 2's complement operation:

Invert all bits, then add 1.

Example — negate +5 (0101) to get −5:

Step 1 — Start: 0101 (+5)
Step 2 — Invert bits: 1010
Step 3 — Add 1: 1011 (−5) ✓

Verify: −8 + 0 + 2 + 1 = −5 ✓

The operation works in both directions — applying it to −5 gives back +5:

Step 1 — Start: 1011 (−5)
Step 2 — Invert bits: 0100
Step 3 — Add 1: 0101 (+5) ✓

5. Why Addition "Just Works"​

The beauty of 2's complement is that the same adder circuit handles both positive and negative numbers with no special cases.

Example — compute 3 + (−5), expecting −2:

0011 (+3)
+ 1011 (−5)
──────
1110 → decode: −8+4+2+0 = −2 ✓

The carry out of the MSB is simply discarded. No sign-detection logic needed.


6. Scaling to the 12-bit ADC​

The ADC12QJ1600-EP uses 12-bit 2's complement. The same rules apply, just with 12 bits:

Code (binary)DecimalMeaning
0111 1111 1111+2047Positive full-scale
0000 0000 0001+11 LSB above zero
0000 0000 00000Zero differential input
1111 1111 1111−11 LSB below zero
1000 0000 0001−20471 LSB above negative full-scale
1000 0000 0000−2048Negative full-scale

The MSB weight is now −2048 (= −2^11), and the range is −2048 to +2047.

Plugging code = −2048 into the ADC equation:

VIN = 0.8 * (−2048)/4096 = −0.4 V

And code = +2047:

VIN = 0.8 * (+2047)/4096 = +0.3998 V

This slight asymmetry (positive side never quite reaches +0.4 V) is an inherent property of 2's complement — the negative side has one extra code.