Ch.1: Introduction
Overview
The ZCU106 is a general purpose evaluation board for rapid-prototyping based on the ZU7EV silicon part and package in the 16 nm FinFET Zynq® UltraScale+™ MPSoC. The ZU7EV device integrates a quad core Arm® Cortex®-A53 processing system (PS) and a dual core Arm Cortex-R5F real-time processor, which provides application developers an unprecedented level of heterogeneous multiprocessing. The ZCU106 evaluation board provides a flexible prototyping platform with high-speed DDR4 memory interfaces, FMC expansion ports, multi-gigabit per second serial transceivers, video codec unit (VCU), several peripheral interfaces, and FPGA fabric for customized designs.
Additional Resources
See Appendix D, Additional Resources and Legal Notices for references to documents, files, and resources relevant to the ZCU106 evaluation board.
Block Diagram
The ZCU106 board block diagram is shown in Figure 1-1.

Board Features
The ZCU106 evaluation board features are listed here. Detailed information for each feature is provided in Component Descriptions in Chapter 3.
- XCZU7EV-2, FFVC1156 package
- PL VCCINT for range in data sheet
- Form factor for PCIe® Gen[1-3]x4 endpoint (PL GTH transceiver), Micro-ATX chassis footprint
- Configuration from Quad SPI
- Configuration from SD card
- Configuration over JTAG with platform cable USB header
- Configuration over JTAG with Arm 20-pin header
- Configuration over USB-to-JTAG bridge
- Clocks
- USER_MGT_SI570
- PL_74.25M, PL_125M, PL_300M
- USER_SMA_MGT
- GTR_DP, GTR_USB3, GTR_SATA
- PS_REF_CLK
- PS DDR4 64-bit SODIMM
- PL DDR4 64-bit component (4x16-bit)
- PS-GTR assignment
- DisplayPort (two GTRs)
- USB3 (one GTR)
- SATA (one GTR)
- PL GTH transceiver assignment (20 total)
- High-definition multimedia interface (HDMI®) (three GTH transceivers)
- FMC HPC1 DP (one GTH transceiver)
- PCIe (four GTH transceivers)
- SDI (one GTH transceiver)
- SMA (one GTH transceiver)
- SFP+ (two GTH transceivers)
- FMC HPC0 DP (eight GTH transceivers)
- PL FMC HPC0 connectivity - full LA bus
- PL FMC HPC1 connectivity - partial LA bus
- PS MIO: dual Quad SPI
- PS MIO: two channels of quad-UART bridge
- PS MIO: CAN
- PS MIO: I2C shared across PS and PL
- PS MIO: SD
- PS MIO: DisplayPort
- PS MIO: system controller I/F
- PS MIO: Ethernet
- PS MIO: USB3
- PS-side user LED (one)
- PS-side user pushbutton (one)
- PL-side user LEDs (eight)
- PL-side user DIP switch (8-position)
- PL-side user pushbuttons (five)
- PL-side CPU reset pushbutton
- PL-side PMOD headers
- PL-side bank 0 PROG_B pushbutton
- Security - PSBATT button battery backup
- SYSMON (previously XADC), prototype header
- Operational switches (power on/off, PROG_B, boot mode DIP switch)
- Operational status LEDs (power status, INIT, DONE, PG, JTAG status, DDR power good)
- Power management
The ZCU106 provides designers a rapid prototyping platform using the XCZU7EV-2FFVC1156 device. The ZU7EV contains many PS hard block peripherals exposed through the multi-use I/O (MIO) interface and several FPGA programmable logic (PL), high-density (HD), and high-performance (HP) banks. Table 1-1 lists a summary of the resources available within the ZU7EV. A feature set overview, description, and ordering information is provided in the Zynq UltraScale+ MPSoC Data Sheet: Overview (DS891) [Ref 1].
Table 1-1: Zynq UltraScale+ MPSoC ZU7EV Features and Resources
| Feature | Resource Count |
|---|---|
| HD banks | Two banks, total of 48 pins |
| HP banks | Six banks, total of 312 pins |
| MIO banks | Three banks, total of 78 pins |
| PS-GTR transceivers (6 Gb/s) | Four PS-GTR transceivers |
| GTH transceivers (16.3 Gb/s) | 20 GTH transceivers |
| VCU | One |
| PCIe hard block Gen1/2/3/4 x4 | Two |
| Logic cells | 504K |
| CLB flip-flops | 460.8K |
| Distributed RAM | 6.2 Mb |
| Total block RAM | 11 Mb |
| UltraRAM | 27 Mb |
| DSP slices | 1728 |
Board Specifications
Dimensions
Height: 7.323 inch (18.60 cm)
Length: 9.5 inch (24.13 cm)
Thickness: 0.062 inch ±0.005 inch (0.157 cm ±0.0127 cm)
Note: A 3D model of this board is not available.
IMPORTANT: The ZCU106 board height exceeds the standard 4.376 inch (11.15 cm) height of a PCI Express® card.
See ZCU106 board documentation for XDC listing, schematics, layout files, board outline drawings, etc.
Environmental
Temperature
Operating: 0°C to +45°C Storage: -25°C to +60°C
Humidity
10% to 90% non-condensing
Operating Voltage
+12VDC