1 Overview

The JESD204C protocol (also known as JESD204 Revision C) is a high throughput data transfer protocol designed specifically for interfacing high speed data converters to logic devices like FPGAs and any ASICs that support the protocol. JESD is developed over the base infrastructure of the Ethernet Protocol, specifically the Physical, Data Link and Transport Layers. In addition, it incorporates additional features suited for data converters and acquisition/sampling related applications. These features allow for accurate synchronization and timing control over multiple physical lanes that the various JESD capable devices in the system may use to exchange data with each other.

The TI-204c FPGA IP has been developed by Texas Instruments for enabling fast and robust system development and bring-up of JESD links between TI data converters and FPGAs.