PL-Side: DDR4 Component Memory
[Figure 2-1, callout 2]
The 2 GB 64-bit wide DDR4 memory system is comprised of four 256 Mb x 16 SDRAMs, U2, and 99-101.
- Manufacturer: Micron
- Part Number: MT40A256M16GE-075E
- Description: 4 Gb (256 Mb x 16) 1.2V 96-ball TFBGA DDR4-2666
The ZCU106 XCZU7EV FFVC MPSoC PL DDR interface performance is documented in the Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925) [Ref 2]. This memory system is connected to the XCZU7EV device banks 64, 65, and 66. The DDR4 0.6V VTT termination voltage is sourced from the TI TPS51200DR linear regulator U35. The connections between the DDR4 component memory and the XCZU7EV device are listed in Table 3-4.
| XCZU7EV (U1) Pin | Net Name | I/O Standard | DDR4 Component Memory | ||
|---|---|---|---|---|---|
| Pin # | Pin Name | Ref. Des. | |||
| AF16 | DDR4_DQ0 | POD12_DCI | G2 | DQL0 | U101 |
| AF18 | DDR4_DQ1 | POD12_DCI | F7 | DQL1 | U101 |
| AG15 | DDR4_DQ2 | POD12_DCI | H3 | DQL2 | U101 |
| AF17 | DDR4_DQ3 | POD12_DCI | H7 | DQL3 | U101 |
| AF15 | DDR4_DQ4 | POD12_DCI | H2 | DQL4 | U101 |
| AG18 | DDR4_DQ5 | POD12_DCI | H8 | DQL5 | U101 |
| AG14 | DDR4_DQ6 | POD12_DCI | J3 | DQL6 | U101 |
| AE17 | DDR4_DQ7 | POD12_DCI | J7 | DQL7 | U101 |
| AA14 | DDR4_DQ8 | POD12_DCI | A3 | DQU0 | U101 |
| AC16 | DDR4_DQ9 | POD12_DCI | B8 | DQU1 | U101 |
| AB15 | DDR4_DQ10 | POD12_DCI | C3 | DQU2 | U101 |
| AD16 | DDR4_DQ11 | POD12_DCI | C7 | DQU3 | U101 |
| AB16 | DDR4_DQ12 | POD12_DCI | C2 | DQU4 | U101 |
| AC17 | DDR4_DQ13 | POD12_DCI | C8 | DQU5 | U101 |
| AB14 | DDR4_DQ14 | POD12_DCI | D3 | DQU6 | U101 |
| AD17 | DDR4_DQ15 | POD12_DCI | D7 | DQU7 | U101 |
| AH14 | DDR4_DQS0_T | DIFF_POD12_DCI | G3 | DQL_T | U101 |
| AJ14 | DDR4_DQS0_C | DIFF_POD12_DCI | F3 | DQL_C | U101 |
| AA16 | DDR4_DQS1_T | DIFF_POD12_DCI | B7 | DQU_T | U101 |
| AA15 | DDR4_DQS1_C | DIFF_POD12_DCI | A7 | DQU_C | U101 |
| AH18 | DDR4_DM0 | POD12_DCI | E7 | DML_B/DBIL_B | U101 |
| AD15 | DDR4_DM1 | POD12_DCI | E2 | DMU_B/DBIU_B | U101 |
| AJ16 | DDR4_DQ16 | POD12_DCI | G2 | DQL0 | U99 |
| AJ17 | DDR4_DQ17 | POD12_DCI | F7 | DQL1 | U99 |
| AL15 | DDR4_DQ18 | POD12_DCI | H3 | DQL2 | U99 |
| AK17 | DDR4_DQ19 | POD12_DCI | H7 | DQL3 | U99 |
| AJ15 | DDR4_DQ20 | POD12_DCI | H2 | DQL4 | U99 |
| AK18 | DDR4_DQ21 | POD12_DCI | H8 | DQL5 | U99 |
| AL16 | DDR4_DQ22 | POD12_DCI | J3 | DQL6 | U99 |
| AL18 | DDR4_DQ23 | POD12_DCI | J7 | DQL7 | U99 |
| AP13 | DDR4_DQ24 | POD12_DCI | A3 | DQU0 | U99 |
| AP16 | DDR4_DQ25 | POD12_DCI | B8 | DQU1 | U99 |
| AP15 | DDR4_DQ26 | POD12_DCI | C3 | DQU2 | U99 |
| AN16 | DDR4_DQ27 | POD12_DCI | C7 | DQU3 | U99 |
| AN13 | DDR4_DQ28 | POD12_DCI | C2 | DQU4 | U99 |
| AM18 | DDR4_DQ29 | POD12_DCI | C8 | DQU5 | U99 |
| AN17 | DDR4_DQ30 | POD12_DCI | D3 | DQU6 | U99 |
| AN18 | DDR4_DQ31 | POD12_DCI | D7 | DQU7 | U99 |
| AK15 | DDR4_DQS2_T | DIFF_POD12_DCI | G3 | DQL_T | U99 |
| AK14 | DDR4_DQS2_C | DIFF_POD12_DCI | F3 | DQL_C_C | U99 |
| AM14 | DDR4_DQS3_T | DIFF_POD12_DCI | B7 | DQU_T | U99 |
| AN14 | DDR4_DQS3_C | DIFF_POD12_DCI | A7 | DQU_C | U99 |
| AM16 | DDR4_DM2 | POD12_DCI | E7 | DML_B/DBIL_B | U99 |
| AP18 | DDR4_DM3 | POD12_DCI | E2 | DMU_B/DBIU_B | U99 |
| AB19 | DDR4_DQ32 | POD12_DCI | G2 | DQL0 | U100 |
| AD19 | DDR4_DQ33 | POD12_DCI | F7 | DQL1 | U100 |
| AC18 | DDR4_DQ34 | POD12_DCI | H3 | DQL2 | U100 |
| AC19 | DDR4_DQ35 | POD12_DCI | H7 | DQL3 | U100 |
| AA20 | DDR4_DQ36 | POD12_DCI | H2 | DQL4 | U100 |
| AE20 | DDR4_DQ37 | POD12_DCI | H8 | DQL5 | U100 |
| AA19 | DDR4_DQ38 | POD12_DCI | J3 | DQL6 | U100 |
| AD20 | DDR4_DQ39 | POD12_DCI | J7 | DQL7 | U100 |
| AF22 | DDR4_DQ40 | POD12_DCI | A3 | DQU0 | U100 |
| AH21 | DDR4_DQ41 | POD12_DCI | B8 | DQU1 | U100 |
| AG19 | DDR4_DQ42 | POD12_DCI | C3 | DQU2 | U100 |
| AG21 | DDR4_DQ43 | POD12_DCI | C7 | DQU3 | U100 |
| AE24 | DDR4_DQ44 | POD12_DCI | C2 | DQU4 | U100 |
| AG20 | DDR4_DQ45 | POD12_DCI | C8 | DQU5 | U100 |
| AE23 | DDR4_DQ46 | POD12_DCI | D3 | DQU6 | U100 |
| AF21 | DDR4_DQ47 | POD12_DCI | D7 | DQU7 | U100 |
| AA18 | DDR4_DQS4_T | DIFF_POD12_DCI | G3 | DQL_T | U100 |
| AB18 | DDR4_DQS4_C | DIFF_POD12_DCI | F3 | DQL_C_C | U100 |
| AF23 | DDR4_DQS5_T | DIFF_POD12_DCI | B7 | DQU_T | U100 |
| AG23 | DDR4_DQS5_C | DIFF_POD12_DCI | A7 | DQU_C | U100 |
| AE18 | DDR4_DM4 | POD12_DCI | E7 | DML_B/DBIL_B | U100 |
| AH22 | DDR4_DM5 | POD12_DCI | E2 | DMU_B/DBIU_B | U100 |
| AL22 | DDR4_DQ48 | POD12_DCI | G2 | DQL0 | U100 |
| AJ22 | DDR4_DQ49 | POD12_DCI | F7 | DQL1 | U2 |
| AL23 | DDR4_DQ50 | POD12_DCI | H3 | DQL2 | U2 |
| AJ21 | DDR4_DQ51 | POD12_DCI | H7 | DQL3 | U2 |
| AK20 | DDR4_DQ52 | POD12_DCI | H2 | DQL4 | U2 |
| AJ19 | DDR4_DQ53 | POD12_DCI | H8 | DQL5 | U2 |
| AK19 | DDR4_DQ54 | POD12_DCI | J3 | DQL6 | U2 |
| AJ20 | DDR4_DQ55 | POD12_DCI | J7 | DQL7 | U2 |
| AP22 | DDR4_DQ56 | POD12_DCI | A3 | DQU0 | U2 |
| AN22 | DDR4_DQ57 | POD12_DCI | B8 | DQU1 | U2 |
| AP21 | DDR4_DQ58 | POD12_DCI | C3 | DQU2 | U2 |
| AP23 | DDR4_DQ59 | POD12_DCI | C7 | DQU3 | U2 |
| AM19 | DDR4_DQ60 | POD12_DCI | C2 | DQU4 | U2 |
| AM23 | DDR4_DQ61 | POD12_DCI | C8 | DQU5 | U2 |
| AN19 | DDR4_DQ62 | POD12_DCI | D3 | DQU6 | U2 |
| AN23 | DDR4_DQ63 | POD12_DCI | D7 | DQU7 | U2 |
| AK22 | DDR4_DQS6_T | DIFF_POD12_DCI | G3 | DQL_T | U2 |
| AK23 | DDR4_DQS6_C | DIFF_POD12_DCI | F3 | DQL_C | U2 |
| AM21 | DDR4_DQS7_T | DIFF_POD12_DCI | B7 | DQU_T | U2 |
| AN21 | DDR4_DQS7_C | DIFF_POD12_DCI | A7 | DQU_C | U2 |
| AL20 | DDR4_DM6 | POD12_DCI | E7 | DML_B/DBIL_B | U2 |
| AP19 | DDR4_DM7 | POD12_DCI | E2 | DMU_B/DBIU_B | U2 |
| AK9 | DDR4_A0 | SSTL12_DCI | P3 | A0 | U2,U99-U101 |
| AG11 | DDR4_A1 | SSTL12_DCI | P7 | A1 | U2,U99-U101 |
| AJ10 | DDR4_A2 | SSTL12_DCI | R3 | A2 | U2,U99-U101 |
| AL8 | DDR4_A3 | SSTL12_DCI | N7 | A3 | U2,U99-U101 |
| AK10 | DDR4_A4 | SSTL12_DCI | N3 | A4 | U2,U99-U101 |
| AH8 | DDR4_A5 | SSTL12_DCI | P8 | A5 | U2,U99-U101 |
| AJ9 | DDR4_A6 | SSTL12_DCI | P2 | A6 | U2,U99-U101 |
| AG8 | DDR4_A7 | SSTL12_DCI | R8 | A7 | U2,U99-U101 |
| AH9 | DDR4_A8 | SSTL12_DCI | R2 | A8 | U2,U99-U101 |
| AG10 | DDR4_A9 | SSTL12_DCI | R7 | A9 | U2,U99-U101 |
| AH13 | DDR4_A10 | SSTL12_DCI | M3 | A10/AP | U2,U99-U101 |
| AG9 | DDR4_A11 | SSTL12_DCI | T2 | A11 | U2,U99-U101 |
| AM13 | DDR4_A12 | SSTL12_DCI | M7 | A12/BC_B | U2,U99-U101 |
| AF8 | DDR4_A13 | SSTL12_DCI | T8 | A13 | U2,U99-U101 |
| AK8 | DDR4_BA0 | SSTL12_DCI | N2 | BA0 | U2,U99-U101 |
| AL12 | DDR4_BA1 | SSTL12_DCI | N8 | BA1 | U2,U99-U101 |
| AE14 | DDR4_BG0 | SSTL12_DCI | M2 | BG0 | U2,U99-U101 |
| AC12 | DDR4_A14_WE_B | SSTL12_DCI | L2 | WE_B/A14 | U2,U99-U101 |
| AF11 | DDR4_A16_RAS_B | SSTL12_DCI | L8 | RAS_B/A16 | U2,U99-U101 |
| AE12 | DDR4_A15_CAS_B | SSTL12_DCI | M8 | CAS_B_A15 | U2,U99-U101 |
| AH11 | DDR4_CK_T | DIFF_SSTL12_DCI | K7 | CK_T | U2,U99-U101 |
| AJ11 | DDR4_CK_C | DIFF_SSTL12_DCI | K8 | CK_C | U2,U99-U101 |
| AB13 | DDR4_CKE | SSTL12_DCI | K2 | CKE | U2,U99-U101 |
| AD14 | DDR4_ACT_B | SSTL12_DCI | L3 | ACT_B | U2,U99-U101 |
| R156 P/D | DDR4_TEN | SSTL12_DCI | N9 | TEN | U2,U99-U101 |
| R499 P/U | DDR4_ALERT_B | SSTL12_DCI | P9 | ALERT_B | U2,U99-U101 |
| AC13 | DDR4_PAR | SSTL12_DCI | T3 | PAR | U2,U99-U101 |
| AF12 | DDR4_RESET_B | LVCMOS12 | P1 | RESET_B | U2,U99-U101 |
| AF10 | DDR4_ODT | SSTL12_DCI | K3 | ODT | U2,U99-U101 |
| AD12 | DDR4_CS_B | SSTL12_DCI | L7 | CS_B | U2,U99-U101 |
The ZCU106 board DDR4 64-bit component memory interface adheres to the constraints guidelines documented in the "PCB Guidelines for DDR4" section of UltraScale Architecture PCB Design User Guide (UG583)[Ref 4]. The ZCU106 DDR4 component interface is a 40Ω impedance implementations. Other memory interface details are also available in the UltraScale Architecture FPGAs Memory Interface Solutions Product Guide (PG150) [Ref 5]. For more details, see the Micron MT40A256M16GE-075E data sheet at the Micron website [Ref 15].