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Board Setup and Configuration

Board Component Location​

Figure 2-1 shows the ZCU106 board component locations. Each numbered component shown in the figure is keyed to Table 2-1. Table 2-1 identifies the components, references the respective schematic (0381770) page numbers, and links to a detailed functional description of the components and board features in Chapter 3.

IMPORTANT: Figure 2-1 is for visual reference only and might not reflect the current revision of the board.

IMPORTANT: There could be multiple revisions of this board. The specific details concerning the differences between revisions are not captured in this document. This document is not intended to be a reference design guide and the information herein should not be used as such. Always refer to the schematic, layout, and XDC files of the specific ZCU106 version of interest for such details.

Electrostatic Discharge Caution​

CAUTION! ESD can damage electronic components when they are improperly handled, and can result in total or intermittent failures. Always follow ESD-prevention procedures when removing and replacing components.

To prevent ESD damage:

  • Use an ESD wrist or ankle strap and ensure that it makes skin contact. Connect the equipment end of the strap to an unpainted metal surface on the chassis.
  • Avoid touching the adapter against your clothing. The wrist strap protects components from ESD on the body only.
  • Handle the adapter by its bracket or edges only. Avoid touching the printed circuit board or the connectors.
  • Put the adapter down only on an antistatic surface such as the bag supplied in your kit.
  • If you are returning the adapter to Xilinx Product Support, place it back in its antistatic bag immediately.
Figure 2-1: ZCU106 Evaluation Board Components

Table 2-1: ZCU106 Board Component Locations

Callout NumberRef. Des.Feature ([B] = bottom of board)NotesSchematic Page
1U1Zynq UltraScale+ XCZU7EV MPSoC, GTH Transceivers, PS GTR TransceiversXCZU7EV-2FFVC11562
2J1PS-Side: DDR4 SODIMM Socket, with DDR4 SODIMMLOTES ADDR0067-P001A, Micron MTA4ATF51264HZ-2G6E124
3U2, U99-U101PL-Side: DDR4 Component Memory, (4 Gb)Micron MT40A256M16GE-075E26-29
4U119, U120Quad SPI Flash Memory (MIO 0-12) [B]Micron MT25QU512ABB8ESF-OSIT53
5U116, J96USB 3.0 Transceiver and USB 2.0 ULPI PHY (USB 3.0 A connector)SMSC USB3320-EZK, KYCON KMMX-AB10-SMTB30TR58
6J100SD Card InterfaceHirose DMIAA-SF-PET(21)54
7U152, J2Programmable Logic JTAG Programming OptionsFTDI FT232HL-REEL, Hirose ZX62D-AB-5P822
8U69SI5341B 10 Independent Output Any-Frequency Clock Generator [B]Silicon Labs SI5341B-B05071-GM44
9U42Programmable User Clock [B]Silicon Labs SI570BAB001614DG45
10U56Programmable User MGT Clock, Cooling Fan ConnectorSilicon Labs SI570BAB000544DG45
11U20SFP/SFP+ Clock Recovery [B]Silicon Labs SI5328B-C-GMR46
12U98, P12GEM3 Ethernet (MIO 64-77), 10/100/1000 MHz Tri-Speed Ethernet PHYTI DP83867IRPAP, Halo HFJ11-1G01E-L12RL59
13U40, J83CP2108 USB UART InterfaceSilicon Labs CP2108-B02-GM, Hirose ZX62D-AB-5P847
14U94, P7HDMI Video Output [B]TI SN65DP159RGZ, TE Connectivity 1888811-140
15U19, P7HDMI Video OutputTI TMDS181IRGZT, TE Connectivity 1888811-141
16U60, U61, U97I2C0 (MIO 14-15), I2C0 bus switch and two expanders [B]TI PCA9544ARGYR, Two each TI TCA6416APWR64
17U34, U135I2C1 (MIO 16-17), I2C1 bus switches [B]Two each TI TCA9548APWR65
18P1, P2SFP/SFP+ ConnectorsMolex 74441-001038-39
19U41TI MSP430 System Controller [B]TI MSP430F534243
20J87User PMOD GPIO HeadersSULLINS PBC36DAAN62
21J160, J55User PMOD GPIO HeadersSULLINS PPPC062LJBN-RC56
22DS37-DS44User I/O, Power and Status LEDsGPIO LEDs, GREEN 060360
23SW13User I/O DIP switchC&K SDA08H1SBD60

Default Jumper and Switch Settings​

Figure 2-2 shows the ZCU106 board jumper header and DIP switch locations. Each numbered component shown in the figure is keyed to Table 2-2 or Table 2-3 (for default switch settings). Both tables reference the respective schematic (0381770) page numbers.

F

Figure 2-2: Board Jumper Header and DIP Switch Locations